Intel CEO Positions 18A Node Ahead of TSMC’s 2nm In Performance & Launch Timeframe

wccftech.com:

Intel's CEO has expressed confidence in its 18A process, claiming that it competes favorably with TSMC's 2nm node while also being delivered earlier.

Intel's CEO Pat Gelsinger sat down with Barron's at Team Blue's recent AI Everywhere event, where the company unveiled its latest Meteor Lake processors. Speaking with the outlet, CEO Gelsinger provided an update on Intel's 18A process, claiming that it has the potential to surpass TSMC's N2 (2nm) node, especially after the utilization of an advanced power delivery method.

We announced two major innovations with 18A: a new transistor and backside power. I think everybody’s looking at the transistor of TSMC’s N2 versus our 18A. It’s not clear that one is dramatically better than the other. We’ll see who’s best.

But the backside power delivery, everybody says Intel, score. You are years ahead of the competition. That’s powerful. That’s meaningful. It gives better area efficiency for silicon, which means lower cost. It gives better power delivery, which means higher performance. So, I have a good transistor. I have great power delivery. I think I’m a little bit ahead of N2, TSMC’s next process technology in time.

Pat Gelsinger (Intel CEO) Via Barron's

Intel's 18A process node will utilize RibbonFET transistors along with a new "PowerVia" delivery method,  which is anticipated to bring significant performance figures onboard. It is disclosed that we could see a 10% gen-to-gen improvement with 18A over 20A. There were reports that ARM might be Intel's first customer of the process, desiring to utilize it for mobile SOCs, but this is currently a mere rumor.

Intel Foundry Services, particularly with its semiconductor technology, hasn't seen much success in terms of industry adoption