MediaTek’s Dimensity 9400 Rumored To Sport The Biggest Die Size For A Smartphone Chipset, With More Than 30 Billion Transistors

wccftech.com:

MediaTek plans to go all out with the upcoming Dimensity 9400 in sheer size, as a fresh rumor floating around claims that the SoC will flaunt the biggest die size to be used in a smartphone platform ever. Thanks to this size increase, the Dimensity 9400 is also said to sport in excess of 30 billion transistors, making the count 32 percent higher than the 22.7 billion transistors found on the Dimensity 9300.

Dimensity 9400’s GPU details also mention a 20 percent bump in performance and efficiency; a bigger die size will lead to increased cost

Coming to the die size first, @faridofanani96 and @negativeonehero have shared on X that the Dimensity 9400 will measure 150mm² and for reference, NVIDIA’s GT 1030 measures 74mm², with the GTX 1650 sporting a die size of 200mm². In short, we are getting a smartphone chipset that has a physical size more or less equivalent to a desktop graphics processor, which is just remarkable. The obvious benefits of using a bigger die size are that companies like MediaTek can cram more transistors, plus a higher cache and bigger Neural Processing Unit.

Related Story NVIDIA’s Next-Gen RTX & AI GPU IP Incorporated Within Mediatek’s Upcoming Dimensity SOCs

As for the drawbacks, the obvious one is cost, and paired with TSMC’s 3nm ‘N3E’ process that will reportedly be leveraged to mass the Dimensity 9400, we could be looking at MediaTek’s most expensive smartphone SoC yet. Fortunately, there are other advantages too, such as the improved performance and efficiency of the GPU, as the rumor claims that we could witness a 20 percent uplift compared to the previous generation, possibly beating the Snapdragon 8 Gen 4 in the process.

Earlier, we reported that the Dimensity 9400 was going through some overheating problems caused by the ARM’s Cortex-X5, not to mention a rapid increase in power consumption. It is possible that MediaTek has addressed this issue by increasing the die size of the SoC, but there is no confirmation at this time. Hopefully, we