The Tensor G4 was officially announced at Google’s Pixel 9 event, and the lack of performance or power-efficiency slides hinted that the chipset could be a minor upgrade over its predecessor, the Tensor G3. However, the company had different plans for its current-generation chipset, which will now materialize with the Tensor G5 in 2025 as the advertising giant will reportedly shift to TSMC’s second-generation 3nm process. However, a new report also states that the Tensor G5 will employ the Taiwanese semiconductor firm’s InFO-POP packaging, and if you want to learn what advantages this will bring to the table, read on more to find out.
A previous update surrounding the Tensor G5 mentioned that it was reached ‘tape-out’ status, which pretty much means that the chipset’s design is complete and all that is required from Google is to send this design to TSMC to be mass produced on its improved 3nm process. However, Commercial Times reports that there is another benefit to waiting for the Pixel 10 series next year and that is the addition of TSMC’s InFO-POP packaging. For those who do not know, InFO-POP stands for integrated fanout package-on-package.
This packaging has been used in chipsets like the A17 Pro for the iPhone 15 Pro and iPhone 15 Pro Max and the S9 found in the Apple Watch Series 9. With the Tensor G5 said to feature this technology, it will allow Google to reduce the footprint of the upcoming SoC, achieve a low height, and improve thermal efficiency. The size reduction will also free up valuable space to include other components. Assuming the company sticks with the same 6.3-inch display size for the base Pixel 10, conserving even a few millimeters of
Read more on wccftech.com