AMD Unleashes 3D V-Cache Powered EPYC Genoa-X CPUs: Up To 1.1 GB Cache, 2.9x Gain Over Xeon

wccftech.com:

AMD has officially launched its 2nd generation EPYC 3D V-Cache CPUs codenamed Genoa-X which boast up to 1.1 GB of stacked cache.

The AMD Genoa-X CPUs are part of the same EPYC 9004 family which currently only offered the standard Genoa CPUs. Today, this lineup is getting expanded with two brand new products, the Genoa-X and Bergamo chips. In this article, we will take a look at what Genoa-X has to offer and how it improves upon the first generation of 3D V-Cache EPYC CPUs codenamed Milan-X. Some highlighted features of AMD's Genoa-X CPUs include:

The first and biggest change is obviously the package in which the AMD EPYC Genoa-X chips come. Just like the standard Genoa CPUs, the Genoa-X CPUs will feature a total of 12 Zen 4 CCDs and a single I/O die but each of the Zen 4 CCDs will feature a 3D V-cache stack with up to 64 MB of L3 cache.

So for AMD's EPYC Genoa-X CPUs, that's 384 MB of L3 cache from the CCDs, 768 MB of L3 cache from the 3D V-Cache stacks, & 96 MB of L2 cache for a total of 1248 MB cache. There are also 3 MB of L1 cache (Instruction/data). This is 2.6x higher cache than the standard Genoa chips and also a 56% increase in cache amount versus the Milan-X (1st Gen EPYC 3D V-Cache chips). All chips will be rated at 400W with TDPs configurable down to 320W.

The top chip will be the EPYC 9684X with the max 96 core and 1152 MB of L3 cache. There will also be the EPYC 9384X with 32 cores, EPYC 9284X with 24 cores, & EPYC 9184X with 16 cores. All chips will be positioned at cache-optimized workloads as was the case with the previous generation of 3D V-Cache EPYC CPUs. The biggest target for Genoa-X CPUs is the HBM-boosted Xeon Max CPU series from Intel. While Intel makes use of HBM as extended memory for specific