In a recent blog post Intel has made some bold claims about its new PowerVia technology, and how it's been performing in Meteor Lake-based test chips, delivering a greater than 5% increase to clock speeds. According to Intel's Ben Sell, vice pres. of technology development, that puts PowerVia on track for delivery next year along with the Intel 20A process node.
PowerVia represents a new way to create processors, effectively sandwiching the transistors in the middle of the chip, with the interconnects to the outside world on the front and the power wiring on the back. This so-called backside power delivery is a big shift in semiconductor manufacturing and at once simplifies, complicates, and alleviates issues with the ever-shrinking of transistors and processors.
PowerVia is going to be first sampled in the upcoming Arrow Lake generation of Intel processors (presumably 15th Gen Core) which is due in 2024 on the Intel 20A production process. But in order to speed up the development process it was decoupled from the design of the 20A process node itself.
In fact Intel has shown the functional benefits of the technology on a «Frankenstein test-chip» called Blue Sky Creek. In reality it's a Meteor Lake-based chip using the upcoming generation's Efficient-core, built on the Intel 4 process, but incorporating the PowerVia tech.
Just from the addition of backside power delivery, Intel claims that it has managed to add more than 5% frequency improvement to the test chip. If we take the clock speed of the Raptor Lake E-cores as a starting point, that would mean a change from 4.3GHz to 4.5GHz just from shifting around where the interconnects and power wiring goes.
Traditionally, chips are built like pizzas (Intel's word, not
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