We're just a week or so away from the retail launch of Intel's Arrow Lake chips and while Team Blue has already given us the full lowdown of what everything is like, there's nothing cooler than seeing the actual chips in their full glory. Enter stage left, Tony Yu, Asus China's general manager, and his Bilibili channel, Ordinary Uncle Tony, to sate that interest.
I spotted Tony Yu's Bilibili video thanks to Uniko's Hardware on X and it's a real treat for processor enthusiasts. We're big fans of Fritzchen Fritz here, who takes some of the most incredible images of chip dies you've ever seen, but Yu's video goes one step further by explaining all of the key parts in each tile in the new Arrow Lake CPUs.
As you're probably already aware, rather than using a single slab of silicon for the whole processor (known as a monolithic design), Arrow Lake follows on from Meteor Lake by using several slices (aka tiles or chiplets) that are all mounted on a separate die, so it can be packaged as a single chip.
Every Arrow Lake processor comprises a compute tile (home to the P- and E-cores, and L3 cache), a SoC tile (housing the neural processor, media engine, DDR5 memory controller, and PCIe controller), an IO tile to handle all the data connections, and teeny tiny GPU tile. Oh, and two blank tiles to fill up the empty spaces.
Altogether, these tiles make a single processor that's a little larger than a Raptor Lake die but because they're manufactured on different TSMC process nodes, certain costs can be reduced. For example, the IO and SoC tiles are made on the relatively old and cheap N6 node, whereas the compute tile uses the latest N3B one.
That particular tile is the most noteworthy as it contains the new P- and E-cores, codenamed Lion Cove and Skymont respectively. These are markedly better than those in Raptor Lake, according to Intel, and you can easily see that the layout is quite different too. Rather than having two massive blocks of different cores, Arrow Lake now has
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