Intel has been selling hybrid CPUs with a mix of Performance and Efficient cores since the launch of 12th Gen Alder Lake CPUs back in November 2021. As it happens, AMD already has its own take on Intel's Efficient cores, as we've reported previously. But AMD is doing thing differently, very differently indeed.
We've explained previously how AMD's smaller Zen 4c cores are functionally identical to full fat Zen 4 with the exception of offering half the L3 cache. And yet they somehow only take up half the space of a Zen 4 core.
So, that's the same execution and issue width, the same number of registers, the same internal latencies, the works. And yes, that does include multi-threading. But somehow you can pack two Zen 4c cores into the same space as one Zen 4 core? Does cutting the L3 cache from 4MB per core to 2MB really make that much difference?
Apparently, no. To be clear, two Zen 4c cores do fit in the space of one Zen 4 core. AMD says that a Zen 4 core covers 3.84mm2 while a Zen 4c core is just 2.48mm2. But there's more to the transition than just cutting out some cache.
YouTube channel TechTechPotato attended a recent AMD Data Center and AI event and managed to uncover some answers. It all comes down to physical design targets. For full fat Zen 4, that includes supporting operating frequencies all the way up to 5.5Ghz and beyond. But for Zen 4c, the clock speed target was reduced to the low 3GHz region.
Turns out that makes a huge difference to how you lay a CPU core out. With lower clocks, you can make the internal structures much smaller with worrying about the interference and power leakages that come with high operating frequencies.
And yet, the core remains functionally identical and offers the same IPC or
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