This spectacular GB202 die shot shows just how massive Nvidia's RTX 5090 GPU is but it's not the largest chip it's ever shoehorned into a gaming graphics card

pcgamer.com:

With Nvidia's RTX 50 series launch at CES earlier this month and all the subsequent reviews of the RTX 5090, especially in-depth ones like our Dave's, laying out all the specifications, we all know that the biggest Blackwell chip is one seriously big GPU. And thanks to a new die shot of the processor, we can now feast our eyes on all those shaders and cache.

Creating a detailed die shot of any processor isn't simple. It takes many failed attempts, involving numerous cracked chips and skin burns, to perfect the process. If that chip just so happens to be an Nvidia GB202, the GPU powering the GeForce RTX 5090, then there are a few other barriers to overcome, namely getting your hands on one and being willing to sacrifice a $2,000+ graphics card for the sake of a picture.

GB202 Dieshot/5090 DieshotThanks By@ASUS Tony 俞元麟 by Chip@万扯淡 by Dieshot@Kurnalsalts LayoutPhoto1 GB202 DieshotPhoto2 AD102 vs GB202 full Pixel Photo pls join in Kurnal’s Telegram teamhttps://t.co/MI6oCa2yOA pic.twitter.com/pny7bvCs5jJanuary 25, 2025

Enter Tony Yu, general manager of Asus China and all-round top chap, to save the day, sharing a high-resolution image of the GB202 die thank X user Kurnal managed to grab hold of and then helpfully label all the key parts (via Tom's Hardware).

While the image itself doesn't reveal any major surprises, as Nvidia has stuck with the same fundamental design layout for many years now, it does that the engineers had to make some interesting decisions in order to get everything to fit within the die's physical dimensions.

For example, if you look at the GB202 and compare it to the AD102 (the RTX 4090's GPU), you'll see that all of the logic blocks for the NVENC video encoders and decoders have moved from the bottom to the very middle of the chip.

The reason for this is twofold: firstly, the GB202 sports three encoders and two decoders, to the AD102's two and one respectively, and it also has an aggregated 512-bit memory bus. If Nvidia had kept the NVENC blocks