Intel's Arrow Lake specs break cover: Say hello to DDR5-6400, wave goodbye to DDR4 and possibly Hyper-Threading

pcgamer.com:

It's fair to say that all of us in the PC Gamer office were somewhat disappointed with Intel's 14th generation of desktop Core CPUs. Fast as you could possibly want, sure, but only a few percent better than the previous gen, and still just as power hungry and hot as ever. It was to be expected, though, considering that it wasn't a new architecture. What we're all waiting for is to see what the real successor, Arrow Lake, will be like and the first hints of it have come to light: Basically, it's like a Raptor-like version of Meteor Lake. Oh.

Well, that's according to a relatively old Intel document, leaked on X (via Wccftech). It provides some details on a pre-alpha Arrow Lake (ARL-S) processor, plus the motherboard socket and chipset it will use. The very fact that it's pre-alpha means that it's a very early engineering sample, which is why the document states that the sample question should only be used with the P-cores disabled!

But there's still lots of interesting stuff to read. For example, the desktop chip has eight P-cores, 16 E-cores, and 1 Low Power E-core, written in the short form of 8+16+1. Arrow Lake will be a tiled structure, just like Meteor Lake, and the biggest one of those has six P-cores, eight E-cores, and two LP E-cores.

One thing that immediately stands out though is that the new P-cores are stated as '8 IA cores/8 threads', which potentially means that Intel is removing Hyper-Threading support. This feature lets one core take on two threads at a time, but not processed in parallel. Think of processor cores being like a long production line, with many stages in them; threads aren't running on all of the stages at once, so those that are ideal can be allocated to another thread.

The last time Intel did something like this was in its 9th generation of Core chips (Coffee Lake), with the i7 9700K and i9 9900K both having eight cores, but only the latter had Hyper-Threading and thus supported twice the number of threads.

There's no indication that