AMD Addresses 2DPC Memory Support on EPYC Genoa CPUs Via BIOS Firmware, Now Shipping Across All Chips

wccftech.com:

AMD has stated that recent reports of a potential memory bug within the EPYC Genoa CPUs are false & that the issue is fixable through a BIOS update.

Mark Papermaster, AMD's Chief Technical Officer, was recently asked to comment about the reported 2DPC (2-DIMMs per Channel) memory constraint issue with the EPYC Genoa CPUs at a recent Morgan Stanley investor conference.

During the conference, Papermaster mentioned, "the two DIMM per channel ... I think what you're referring to is following. So that is for a targeted — a much smaller targeted set of customers. Those speeds will be announced later this quarter, which will ramp as well, but this number of customers for [2DPC] is much smaller."

As reported by Tom's Hardware, Papermaster gave enough vagueness to his answer that the website went to AMD for an official statement. AMD assured that the company would not have to manufacture new chips again to replace the current product and has also issued multiple BIOS updates to AMD's OEM clients to enable support for 2DPC configs by the end of this first quarter. Currently, only one platform is available for sale from the manufacturer Tyan.

When Tom's Hardware asked about Papermaster's statement, AMD clarified that the information is about systems that support the new 2DPC configurations. Those chips require more slots and are not meant to be confused with AMD's CTO statement.

AMD released the new EPYC Genoa server processors offering twelve-channel DDR5 memory support and numerous innovative interfaces last year. The initial configuration only supported a single DIMM in each channel, supporting a single memory stick for every twelve-channel DDR5 controller. Due to the chip being shipped with dual DIMM support per each memory channel,